Abstract: Based on the Hynix 180 nm BCD process, a fast transient Buck converter capable of multi-chip interleaved parallel operation has been designed. The converter is controlled by Constant on-Time (COT) current mode control and integrates multi-phase interleaved parallel and Adaptive Voltage Positioning (AVP) regulation techniques to enhance system transient response performance. To address the inherent switch frequency drift issue of COT control, a Phase-Locked Loop (PLL) modulation strategy is employed to construct an internally and externally synchronized dual PLL system, ensuring constant system switching frequency and synchronization with external input clock signals. An output offset calibration circuit is designed to resolve the output voltage offset issue caused by low op-amp gain in the current-mode AVP. The input voltage range of the Buck converter is 4 - 16 V, with integrated power MOSFETs and a maximum sustainable output current of 5 A. It supports up to 12-phase interleaved parallel operation to meet power demands ranging from 0 to 60 A. The synchronous switching frequency range is 0.8 - 4.0 MHz. Simulation results demonstrate a peak efficiency of 96.1% for the system. Under conditions of 12 V input voltage and 1.2 V output voltage, when the load steps from 0 A to 5 A (and vice versa) within 100 ns, the recovery times of the system under single-phase, dual-phase, and single-phase AVP conditions are 9.8 μs (10.6 μs), 7.5 μs (5.4 μs), and 3.9 μs (3.6 μs) respectively.