Abstract: high-speed digital isolator circuit integrated into a Low-Voltage Differential Signaling(LVDS) isolation interface chip is proposed, which can be widely used in high reliability, high data rate transmission systems. The isolated transmission of signals is based on pulse polarity modulation. The high-speed digital isolator Transmitter- Receiver(Tx-Rx) circuit adopts a fully differential architecture and has high Common Mode Transient Immunity (CMTI). To reduce the propagation delay of the signal, the edge detection circuit in the traditional design is eliminated at the transmitting end, and an H-bridge drive circuit is used to directly drive the primary side of the transformer. To improve the transmission rate of signals, two Capacitor Cross-Coupled Common-Gate Low-Noise Amplifers (CCC-CGLNA) with fixed offset voltages are used at the front end of the receiving end, which can identify the high amplitude signal pulses generated on the secondary side of the transformer and filter out the low amplitude reverse pulses. This article provides a theoretical analysis of the proposed high-speed digital isolator Tx-Rx circuit and simulates key signals. The LVDS interface chip integrated with the high-speed digital isolator circuit is fabricated on a 180 nm 3.3 V standard CMOS process and packaged after bonding with an on-chip transformer. After testing, the LVDS signal transmission rate exceeds 600 Mbps, with a propagation delay of less than 4.5 ns. The CMTI of the LVDS isolation interface chip can reach 35 kV/μs. Due to the built-in refresh circuit, the overall power consumption of the chip is relatively high.