Abstract: The continuous scaling of integrated circuit technology has rendered ultra-thin film devices increasingly susceptible to high-energy electrostatic discharge (ESD) events. To enhance the ESD protection capability of such devices, this paper proposes a back-gate controlled grounded-gate tunneling field-effect transistor (BGC-GGTFET) ESD protection structure based on ultra-thin body silicon-on-insulator (UTB-SOI) technology. By introducing an ESD voltage control signal to the back-gate and utilizing a heavily doped N-well region, an effective vertical electric field modulation mechanism is established. This mechanism significantly alters the carrier density distribution in the channel, accelerates the reduction of turn-on resistance, and thereby facilitates the rapid formation of an ESD current discharge path. TCAD simulation results show that, compared with a conventional device, the proposed structure reduces the turn-on time from 0.73 ns to 0.19 ns, achieving a response speed improvement of over three times. The failure current increases from 1.7 mA to 1.81 mA, corresponding to a 6.5% enhancement in current discharge capability. These results confirm the superior robustness of the new structure against ESD stress, providing a valuable reference for ESD protection design of tunneling field-effect transistors in advanced UTB-SOI technologies.