• AlN/GaN混合缓冲层双异质结p-GaN HEMT直流特性仿真

    Simulation on the DC characteristics of double heterojunction p-GaN HEMT with AlN/GaN hybrid buffer layer

    • GaN基高电子迁移率晶体管(High Electron Mobility Transistors, HEMT)凭借高电子迁移率和高饱和载流子速度等优势,在功率电子领域具有重要应用前景。针对其在实际应用中面临的击穿电压受限及电场分布不均等问题,提出一种具有AlN/GaN混合缓冲层结构的双异质结p-GaN HEMT器件,旨在提升击穿电压(Vbr)。通过TCAD仿真软件研究了不同缓冲层异质对器件导通特性与击穿性能的影响,并通过优化势垒层Al组分和栅漏间距(Lgd)等关键参数以获取更加优越的器件性能。研究表明,混合缓冲层结构可以通过界面极化电荷的多级分布,使栅极边缘峰值电场从1.6 MV/cm降低至0.9 MV/cm,提升了电场均匀性。混合缓冲层结构有效抑制了局部电场集中,使击穿电压达到1 173 V,与常规器件相比提升了19.1%。此外,势垒层Al组分的增加和Lgd的扩展可进一步抑制电场集中,优化后的器件最终实现了1 410 V的击穿电压,其击穿性能显著提升。同时,阈值电压(Vth)因p-GaN栅极的静电控制优势保持稳定,达到2.51 V的理想水平。本研究结果为GaN功率器件的结构设计提供了理论依据与结构优化方案,对推动HEMT器件的发展具有积极意义。

       

      Abstract: GaN-based high electron mobility transistors (HEMTs) have garnered considerable attention due to these advantages of high electron mobility and saturated carrier velocity. Regarding the limited breakdown voltage and non-uniform electric field distribution, this paper proposes a dual-heterojunction p-GaN HEMT device with an AlN/GaN hybrid buffer layer structure, aiming to improve the breakdown voltage (Vbr). The influence of buffer layer heterogeneity on the DC characteristics of devices is studied using TCAD software, and key parameters such as the Al composition of the barrier layer and the gate drain spacing (Lgd) are optimized to achieve superior device performance. Research has shown that the hybrid buffer layer structure can reduce the peak electric field at the gate edge from 1.6 MV/cm to 0.9 MV/cm through the multi-level distribution of interface polarized charges, improving the uniformity of the electric field. The structure effectively suppresses local electric field concentration, resulting in a Vbr of 1 173 V, which is 19.1% higher than conventional devices. In addition, the increase of Al composition in the barrier layer and the expansion of Lgd can further suppress electric field concentration. The optimized device achieved a Vbr of 1 410 V, significantly improving its breakdown performance. The threshold voltage (Vth) remains stable due to the electrostatic control advantage of p-GaN gate, reaching an ideal lever of 2.51 V. This research results provide structural optimization scheme for the design of GaN power devices, which is of great significance for promoting the development of HEMT devices.

       

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