Abstract: To address the critical security challenges in the secure implementation of the SM4 algorithm under the evolving landscape of side-channel attack techniques, and to overcome the drawbacks of existing higher-order masking schemes—namely high resource consumption and the lack of provable security under a glitch-extended probing model—this paper proposes a low-randomness second-order threshold implementation scheme for the SM4 S-box, and further designs and implements a glitch-resistant secure SM4 circuit capable of withstanding second-order side-channel attacks. The proposed scheme optimizes the S-box based on a tower-field architecture and integrates threshold implementation with the Changing of the Guards technique, reducing the random bit consumption to 66 bits. Formal verification using MaskVerif and Prover, along with TVLA-based leakage assessment, demonstrates that the design can effectively resist second-order side-channel attacks, thereby providing a feasible path for the secure implementation of the SM4 algorithm in resource-constrained environments.